z16 SMF 113s – Understanding Processor Cache Counters
Project and Program:
Core Platform,
z/OS Systems Programming,
Hardware,
Enterprise Architecture,
Performance & Capacity Management,
zNextGen
Tags:
Proceedings ,
SHARE Kansas City 2024
The SMF 113 processor cache counter measurements are critical whenever
evaluating a CEC’s delivered capacity, or when upgrading or making changes to
the processor environment. During this session, Peter Enrico will discuss the
z16 processor cache counters, what they mean, and how they can be used. This
will be a very interesting and educational session.
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