Optimizing Processor Cache on z13 & z14 Processors
Project and Program:
MVS,
MVS Performance
Tags:
Proceedings ,
SHARE Sacramento 2018 ,
2018
Beginning with z13 processors and continuing with z14s, customer experiences have confirmed that delivered capacity is more dependent than ever before on effective utilization of processor cache. This session covers how to interpret the SMF 113 metrics to optimize your environment and reduce CPU consumption (and MLC software) expense.
Particular focus will be given to z14 cache design changes, and their impact will be assessed using metrics from multiple z14 case studies. Overall, the presentation incorporates findings and case studies gleaned from reviewing detailed processor cache data from more than 50 sites across 5 countries.
This core content has recently been recognized with SHARE Best Session and CMG Best Paper awards.-Todd Havekost-IntelliMagic
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