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Achieving CPU (& MLC) Savings through Optimizing Processor Cache

Project and Program: MVS, MVS Performance

Tags: Proceedings , SHARE Providence 2017 , 2017

Customer experiences with z13 processors have confirmed that delivered capacity is more dependent than ever before on effective utilization of processor cache.Â This session will cover everything you need to know to interpret the enlightening metrics available from the SMF 113 records in order to optimize your environment and reduce CPU consumption and MLC software expense.
Insights into the potential impact of various tuning actions will be brought to life with data from numerous real-life case studies.Â This session builds upon a related user experience presentation that was selected for a â€œSHARE Best Sessionâ€� award last Spring, but has been significantly expanded with knowledge and experiences gained from reviewing data from dozens of sites.-Todd Havekost-IntelliMagic

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