The New IBM z13 Part 1: Processor Design, Server Structure, z/Architecture Enhancements, and Operating System Support

Project and Program: MVS, MVS Core Technologies

Tags: Proceedings , 2015 , SHARE in Seattle 2015

Come to this session for a technical introduction to the newest member of the IBM z Systems family, the IBM z13. In Part 1, you will be introduced to z13 processor and storage control chip design; cache enhancements;  the new bi-nodal processor drawer design and model structure; memory offerings; and the latest additions to z/Architecture, including simultaneous multithreading (SMT) and the new Single Instruction Multiple Data (SIMD) instructions that will accelerate business analytics processing. Gain insight into how the PR/SM hypervisor has been enhanced to optimize z13 performance.  Get an introduction to the fundamentals of how SMT is implemented and how it is designed to increase zIIP and IFL capacity. Build a foundation for planning z13 exploitation and get prepared to attend  more in depth sessions on these topics. This session is the first part of a two part sequence. Please consider attending the second session, 16459: The New IBM z13 Part 2: Crypto, I/O Design, Features and Functions, Parallel Sysplex and Implementation Planning-Harv Emery-IBM Corporation

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